Cache-Coherent Accelerators for Efficient Persistent Memory Programming
NSF CNS 2245999Emerging coherent and non-coherent device interfaces are changing how systems software accesses persistent memory, remote memory, and I/O devices. Cache-coherent accelerators can interpose on persistent memory operations without putting software back on the critical path, while efficient ordering mechanisms can keep CPU-to-device communication fast even when the interconnect itself is non-coherent.
The resulting systems combine accelerator-managed crash consistency, support for remote memory access, and memory-ordering mechanisms for fast I/O paths.
Publications
Efficient Remote Memory Ordering for Non-Coherent Systems
Wei Siew Liew, Md Ashfaqur Rahaman, Adarsh Patil, Ryan Stutsman, and Vijay Nagarajan
ASPLOS '26
Efficient ordering mechanisms for CPU-to-device communication over
non-coherent interconnects.
Stop Taking the Scenic Route: the Shortest Distance Between the CPU and the NIC is MMIO
Wei Siew Liew, Md Ashfaqur Rahaman, James McMahon, Ryan Stutsman, and Vijay Nagarajan
HotOS '25
A case for carefully ordered MMIO as a short, efficient path between
CPUs and NICs.
Auto-reconfiguration for Latency Minimization in CPU-based DNN Serving
Ankit Bhardwaj, Amar Phanishayee, Deepak Narayanan, and Ryan Stutsman
ICML '25
Automatic reconfiguration for latency-sensitive serving workloads.
Remote Memory Prefetching: Is Coarse-grained Fine?
James McMahon, Vinita Pawar, and Ryan Stutsman
ICPE '25
A study of prefetching granularity for remote memory systems.
ObjecTier: Non-Invasively Boosting Memory Tiering Performance
Vinita Pawar, Ankit Bhardwaj, and Ryan Stutsman
ICPE '25
Application-informed memory tiering without invasive application
changes.
Cache-Coherent Accelerators for Persistent Memory Crash Consistency
Ankit Bhardwaj, Todd Thornley, Vinita Pawar, Reto Achermann, Gerd Zellweger, and Ryan Stutsman
HotStorage '22
Cache-coherent accelerator support for persistent memory crash
consistency.
